A design methodology for programmable-gain low-noise TIA in CMOS

Abstract

The work reports on the design of an area-efficient inductor-less low-noise CMOS trans\-impedance amplifier suitable for entry-level optical time-domain reflectometers. The work suggests a novel approach for implementing a programmable-gain in capacitive feedback TIA with an independent adjustment of the low- and high-frequency behavior using the input stage biasing impedance and one of the feedback capacitors. The approach addresses a typical noise problem of fast feed-forward or resistive feedback topologies while alleviating the trade-off of the key TIA performance indicators. A more accurate amplifier model is proposed which takes into account the effects due to capacitive isolation and both biasing circuits. Further modifications to the reference design are suggested including the PMOS-based implementation of the biasing circuit to address the voltage headroom issue. The circuit was implemented using a standard 180 nm CMOS process and operates from 1.8 V supply with a drawn current of 11.7 mA.