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dc.contributor.authorVasjanov, Aleksandr
dc.contributor.authorBarzdėnas, Vaidotas
dc.date.accessioned2023-09-18T17:22:31Z
dc.date.available2023-09-18T17:22:31Z
dc.date.issued2018
dc.identifier.issn2079-9292
dc.identifier.urihttps://etalpykla.vilniustech.lt/handle/123456789/122530
dc.description.abstractImpedance matching is concurrent with any radio frequency (RF) circuit design and is essential for maximizing the gain and efficiency while minimizing the noise of high-frequency amplifiers as well as some mixer topologies. The main impedance matching network components are capacitors, inductors, and RF transformers all of which contain parasitic parameters that influence the matching response S11 curve. After calculating matching network component values using classical matching techniques, the measured and simulated response curves differ depending on the target frequency. This results in multiple calculations and measurement cycles in order to precisely match the source and load at the desired frequency. This article proposes an algorithm and methodology of estimating component parasitic parameters and taking them into account when calculating the main component parameters (capacitance and inductance). The proposed algorithm has been implemented as a toolbox in Cadence Virtuoso and verified through simulation and measurements. Measurement results show, that at 500 MHz 10% tolerance components with parasitics included and values based on classical theory provide a 3.2–9.8% offset from the target frequency. In the same conditions, matching networks with compensated (according to the proposed algorithm) values provide 0.1–8.8% target frequency offset. At 1500 MHz 10% components provided 4–12.3% (non-compensated) and 1–8.7% (compensated) target frequency offset ranges. At 3000 MHz. The frequency offset range of using compensated matching network component values is reduced from 5.5–15.1% to 1.3–8.1%.eng
dc.formatPDF
dc.format.extentp. 1-15
dc.format.mediumtekstas / txt
dc.language.isoeng
dc.relation.isreferencedbyINSPEC
dc.relation.isreferencedbyScopus
dc.relation.isreferencedbyScience Citation Index Expanded (Web of Science)
dc.source.urihttps://doi.org/10.3390/electronics7090188
dc.titleA methodology improving off-chip, lumped RF impedance matching network response accuracy
dc.typeStraipsnis Web of Science DB / Article in Web of Science DB
dcterms.licenseCreative Commons – Attribution – 4.0 International
dcterms.references20
dc.type.pubtypeS1 - Straipsnis Web of Science DB / Web of Science DB article
dc.contributor.institutionVilniaus Gedimino technikos universitetas
dc.contributor.facultyElektronikos fakultetas / Faculty of Electronics
dc.subject.researchfieldT 001 - Elektros ir elektronikos inžinerija / Electrical and electronic engineering
dc.subject.vgtuprioritizedfieldsIK0202 - Išmaniosios signalų apdorojimo ir ryšių technologijos / Smart Signal Processing and Telecommunication Technologies
dc.subject.ltspecializationsL106 - Transportas, logistika ir informacinės ir ryšių technologijos (IRT) / Transport, logistic and information and communication technologies
dc.subject.enalgorithm
dc.subject.enCadence
dc.subject.enimpedance matching
dc.subject.enlumped components
dc.subject.enOCEAN
dc.subject.enRF circuits
dc.subject.enSKILL
dc.subject.enVirtuoso
dcterms.sourcetitleElectronics
dc.description.issueiss. 9
dc.description.volumevol. 7
dc.publisher.nameMDPI
dc.publisher.cityBasel
dc.identifier.doi2-s2.0-85053839922
dc.identifier.doi000448397200035
dc.identifier.doi10.3390/electronics7090188
dc.identifier.elaba30834400


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