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dc.contributor.authorPomarnacki, Raimondas
dc.contributor.authorGurskas, Antanas
dc.contributor.authorUrbanavičius, Vytautas
dc.date.accessioned2023-09-18T19:17:39Z
dc.date.available2023-09-18T19:17:39Z
dc.date.issued2012
dc.identifier.issn1392-1215
dc.identifier.other(BIS)VGT02-000025190
dc.identifier.urihttps://etalpykla.vilniustech.lt/handle/123456789/137534
dc.description.abstractThe algorithm for synthesis of the multi-tapped meander delay line (MTMDL) topology is proposed in this article. The algorithm is based on search of construction parameters of the MTMDL according to Monte Carlo method. Proposed algorithm was realized as software and tested on 14 nodes computer cluster. Experimental synthesis of lines has shown adequacy of the suggested algorithm. It has been shown that increasing number of nodes in the cluster, synthesis is executing faster and parallel part of the algorithm approaches to 90 percent of total algorithm. It is revealed that the maximal efficiency of the algorithm is achieved when the number of cluster nodes reaches the number of all issued synthesis processes.eng
dc.formatPDF
dc.format.extentp. 41-44
dc.format.mediumtekstas / txt
dc.language.isoeng
dc.relation.isreferencedbyScience Citation Index Expanded (Web of Science)
dc.relation.isreferencedbyINSPEC
dc.relation.isreferencedbyVINITI
dc.source.urihttps://doi.org/10.5755/j01.eee.18.8.2608
dc.titleTopology synthesis of the Multi-Tapped Meander Delay Line using Monte Carlo method
dc.typeStraipsnis Web of Science DB / Article in Web of Science DB
dcterms.references13
dc.type.pubtypeS1 - Straipsnis Web of Science DB / Web of Science DB article
dc.contributor.institutionVilniaus Gedimino technikos universitetas
dc.contributor.facultyElektronikos fakultetas / Faculty of Electronics
dc.subject.researchfieldT 001 - Elektros ir elektronikos inžinerija / Electrical and electronic engineering
dc.subject.enCircuit topology
dc.subject.enDelay lines
dc.subject.enIntegrated circuit synthesis
dc.subject.enMicrowave devices
dc.subject.enParallel algorithms
dcterms.sourcetitleElektronika ir elektrotechnika
dc.description.issueno. 8
dc.description.volumeVol. 18
dc.publisher.nameKTU
dc.publisher.cityKaunas
dc.identifier.doi000310422400009
dc.identifier.doi10.5755/j01.eee.18.8.2608
dc.identifier.elaba3995009


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