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Development and analysis of integrated circuit topology element recognition system

dc.contributor.authorMasalskis, Giedrius
dc.date.accessioned2023-09-18T08:49:16Z
dc.date.available2023-09-18T08:49:16Z
dc.date.issued2010
dc.identifier.other(BIS)VGT02-000022228
dc.identifier.urihttps://etalpykla.vilniustech.lt/handle/123456789/107732
dc.format.extent24 p.
dc.format.mediumtekstas / txt
dc.language.isoeng
dc.titleDevelopment and analysis of integrated circuit topology element recognition system
dc.typeDaktaro disertacijos santrauka / Doctoral dissertation summary
dcterms.references3
dc.type.pubtypeETD_DR_S - Daktaro disertacijos santrauka / Doctoral dissertation abstract
dc.contributor.institutionVilniaus Gedimino technikos universitetas
dc.contributor.facultyElektronikos fakultetas / Faculty of Electronics
dc.subject.researchfieldT 001 - Elektros ir elektronikos inžinerija / Electrical and electronic engineering
dc.publisher.nameTechnika
dc.publisher.cityVilnius
dc.identifier.elaba14395062


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