dc.contributor.author | Vasjanov, Aleksandr | |
dc.contributor.author | Barzdėnas, Vaidotas | |
dc.date.accessioned | 2023-09-18T17:29:02Z | |
dc.date.available | 2023-09-18T17:29:02Z | |
dc.date.issued | 2018 | |
dc.identifier.uri | https://etalpykla.vilniustech.lt/handle/123456789/123690 | |
dc.description.abstract | Impedance matching is essential to radio frequency (RF) high-end circuit design and research. Circuit blocks like low noise and power amplifiers (LNA and PA), as well as some mixer topologies, require proper source and load impedance matching for the most effective operation. Cadence includes different tools and analyses but lacks an innate impedance matching toolbox, which results in using third party software to conduct these calculations. This article presents an impedance matching network synthesis (IMNS) toolbox which can be integrated into the Cadence environment and provide extensive features. The latter IMNS toolbox not only provides a capability of calculating theoretical impedance matching network component values, but also includes a proposed surface-mount device (SMD) component package parasitics compensation algorithm. Furthermore, fully automated calculated matching network synthesis and simulation within the Cadence environment has also been integrated. As a result, all lossless (ideal) and lossy (containing parasitics) circuit solutions are automatically found, synthesized in a Cadence library (making further circuit reuse later on in the design flow possible), evaluated and a text report with the latter data generated. The proposed SMD component parasitics compensation algorithm includes lossy capacitor and inductor parameter prediction as a function of package size, frequency and component value. | eng |
dc.format.extent | p. 1-2 | |
dc.format.medium | tekstas / txt | |
dc.language.iso | eng | |
dc.source.uri | https://www.cadence.com/content/cadence-www/global/ko_KR/home/cdnlive/emea-2018/proceedings.html | |
dc.title | Impedance matching network synthesis toolbox for Cadence | |
dc.type | Kitos konferencijų pranešimų santraukos / Other conference presentation abstracts | |
dcterms.references | 2 | |
dc.type.pubtype | T3 - Kitos konferencijos pranešimo tezės / Other conference presentation abstracts | |
dc.contributor.institution | Vilniaus Gedimino technikos universitetas | |
dc.contributor.faculty | Elektronikos fakultetas / Faculty of Electronics | |
dc.subject.researchfield | T 001 - Elektros ir elektronikos inžinerija / Electrical and electronic engineering | |
dc.subject.vgtuprioritizedfields | IK0202 - Išmaniosios signalų apdorojimo ir ryšių technologijos / Smart Signal Processing and Telecommunication Technologies | |
dc.subject.ltspecializations | L106 - Transportas, logistika ir informacinės ir ryšių technologijos (IRT) / Transport, logistic and information and communication technologies | |
dc.subject.en | Cadence | |
dc.subject.en | impedance | |
dc.subject.en | matching | |
dc.subject.en | synthesis | |
dc.subject.en | toolbox | |
dcterms.sourcetitle | CDN Live EMEA 2018 : Cadence user conference, May 7-9, 2018, Munich, Germany | |
dc.publisher.name | Cadence Design Systems, Inc. | |
dc.publisher.city | Munich | |
dc.identifier.elaba | 31779209 | |