FPGA based fast Lithuanian isolated word recognition system

Abstract

The article presents the Lithuanian isolated word recognition system implementation in a FPGA hard-core. The pursued objective is the acceleration of the previous soft-core implementation at both key stages: feature extraction and recognition. The 12-th order cepstral analysis is used to extract speech signal features, while for isolated word recognition a dynamic time warping is used. Implementation completely done in the VHDL hard-core allowed us to 320 times speed-up the signal cepstrum calculation and 348 times - one dynamic time warping comparison with border constraints. The recognition system works in real time and is built on medium class FPGA, operating at 50 MHz main clock frequency. It is tested on 6 times repeated 100 Lithuanian words dictionary. Speaker dependent recognition tests done for 10 speakers yield the 97.7 % average recognition accuracy (with 4.9 % recognition improvement over the previous implementation).