| dc.rights.license | Visos teisės saugomos / All rights reserved | en_US |
| dc.contributor.author | Vasjanov, Aleksandr | |
| dc.contributor.author | Barzdėnas, Vaidotas | |
| dc.contributor.author | Wang, Sen | |
| dc.date.accessioned | 2025-12-30T13:06:21Z | |
| dc.date.available | 2025-12-30T13:06:21Z | |
| dc.date.issued | 2024 | |
| dc.identifier.isbn | 9798350352429 | en_US |
| dc.identifier.issn | 2831-5634 | en_US |
| dc.identifier.uri | https://etalpykla.vilniustech.lt/handle/123456789/159630 | |
| dc.description.abstract | Modern electronic devices operate at frequencies where interconnects function as transmission lines, necessitating meticulous management of characteristic impedance (Z0) to avert signal degradation and power losses. This paper delves into the manipulation of microstrip characteristic impedance through variations in trace inductance and capacitance. It proposes a reference plane cut-out compensation technique to mitigate impedance inconsistencies introduced by component pads of varied sizes, which disrupt the uniformity of the microstrip. The technique involves adjusting capacitance by altering the distance to the reference plane. Experimental validation on a 6-layer printed circuit board (PCB) device confirms the effectiveness of the proposed method in maintaining impedance close to the target value of 50Ω, critical for high-frequency applications. Measurements using a vector network analyzer demonstrate substantial impedance improvement up to 35Ω through compensation, offering insights into practical impedance control strategies for high-frequency dense PCB designs. | en_US |
| dc.description.sponsorship | Joint Research Collaborative Seed Grant Program between National Taipei University of Technology and Vilnius Gediminas Technical University | en_US |
| dc.format.extent | 4 p. | en_US |
| dc.format.medium | Tekstas / Text | en_US |
| dc.language.iso | en | en_US |
| dc.relation.uri | https://etalpykla.vilniustech.lt/handle/123456789/159404 | en_US |
| dc.source.uri | https://ieeexplore.ieee.org/document/10542598 | en_US |
| dc.subject | discontinuity | en_US |
| dc.subject | impedance | en_US |
| dc.subject | microstrip | en_US |
| dc.subject | probe | en_US |
| dc.subject | time domain reflectometry | en_US |
| dc.subject | TDR | en_US |
| dc.title | Compensated Stepped Microstrip Lines: A Novel Approach for Impedance Discontinuity Mitigation | en_US |
| dc.type | Konferencijos publikacija / Conference paper | en_US |
| dcterms.accrualMethod | Rankinis pateikimas / Manual submission | en_US |
| dcterms.issued | 2024-06-05 | |
| dcterms.references | 15 | en_US |
| dc.description.version | Taip / Yes | en_US |
| dc.contributor.institution | Vilniaus Gedimino technikos universitetas | en_US |
| dc.contributor.institution | Vilnius Gediminas Technical University | en_US |
| dc.contributor.institution | National Taipei University of Technology | en_US |
| dc.contributor.faculty | Elektronikos fakultetas / Faculty of Electronics | en_US |
| dc.contributor.department | Kompiuterijos ir ryšių technologijų katedra / Department of Computer Science and Communications Technologies | en_US |
| dcterms.sourcetitle | 2024 IEEE Open Conference of Electrical, Electronic and Information Sciences (eStream), April 25, 2024, Vilnius, Lithuania | en_US |
| dc.identifier.eisbn | 9798350352412 | en_US |
| dc.identifier.eissn | 2690-8506 | en_US |
| dc.publisher.name | IEEE | en_US |
| dc.publisher.country | United States of America | en_US |
| dc.publisher.city | New York | en_US |
| dc.description.grantnumber | NTUT-VGTU-113-01/2023-03 | en_US |
| dc.identifier.doi | https://doi.org/10.1109/eStream61684.2024.10542598 | en_US |